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74AUP1G97GX產(chǎn)品應用圖解:
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NXP產(chǎn)品 - 74AUP1G97GX介紹
74AUP1G97GX - Low-power configurable multiple function gate

74AUP1G97GX是NXP公司的一款可配置門產(chǎn)品,74AUP1G97GX是Low-power configurable multiple function gate,本站介紹了74AUP1G97GX的封裝應用圖解、特點和優(yōu)點、功能等,并給出了與74AUP1G97GX相關的NXP元器件型號供參考。

74AUP1G97GX - Low-power configurable multiple function gate - 可配置門 - 門 - 恩智浦, LLC

產(chǎn)品描述

The 74AUP1G97 provides configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions MUX, AND, OR, NAND, NOR, inverter and buffer. All inputs can be connected to VCC or GND.

This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

The 74AUP1G97 has Schmitt trigger inputs making it capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.

The inputs switch at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative voltage VT- is defined as the input hysteresis voltage VH.

產(chǎn)品特性和優(yōu)勢
  • Wide supply voltage range from 0.8 V to 3.6 V
  • High noise immunity
  • ESD protection:
    • HBM JESD22-A114F exceeds 5000 V
    • MM JESD22-A115-A exceeds 200 V
    • CDM JESD22-C101E exceeds 1000 V
  • Low static power consumption; ICC = 0.9 μA (maximum)
  • Latch-up performance exceeds 100 mA per JESD 78 Class II
  • Inputs accept voltages up to 3.6 V
  • Low noise overshoot and undershoot < 10 % of VCC
  • IOFF circuitry provides partial power-down mode operation
  • Multiple package options
  • Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃
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