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74LVC2G16GN技術(shù)文檔下載：
74LVC2G16GN產(chǎn)品應(yīng)用圖解：
http://www.cn.nxp.com/download/pip/74LVC2G16GN/all
74LVC2G16GN - Dual buffer gate
74LVC2G16GN是NXP公司的一款緩沖器/驅(qū)動(dòng)器產(chǎn)品，74LVC2G16GN是Dual buffer gate，本站介紹了74LVC2G16GN的封裝應(yīng)用圖解、特點(diǎn)和優(yōu)點(diǎn)、功能等，并給出了與74LVC2G16GN相關(guān)的NXP元器件型號(hào)供參考。
74LVC2G16GN - Dual buffer gate - 緩沖器/驅(qū)動(dòng)器 - 邏輯 - 恩智浦, LLC
產(chǎn)品描述
The 74LVC2G16 provides two buffers.
Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use ofthese devices in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using IOFF.The IOFF circuitry disables the output, preventing the damaging backflowcurrent through the device when it is powered down.
產(chǎn)品特性和優(yōu)勢(shì)
- Wide supply voltage range from 1.65 V to 5.5 V
- 5 V tolerant inputs for interfacing with 5 V logic
- High noise immunity
- Complies with JEDEC standard:
- JESD8-7 (1.65 V to 1.95 V)
- JESD8-5 (2.3 V to 2.7 V)
- JESD8B/JESD36 (2.7 V to 3.6 V)
- ESD protection:
- HBM JESD22-A114F exceeds 2000 V
- MM JESD22-A115-A exceeds 200 V
- ±24 mA output drive (VCC = 3.0 V)
- CMOS low power consumption
- Latch-up performance exceeds 250 mA
- Direct interface with TTL levels
- Multiple package options
- Specified from -40 °C to +85 °C and -40 °C to +125 °C.
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