PCA9848BS是NXP公司的一款I(lǐng)²C增強(qiáng)快速模式產(chǎn)品，PCA9848BS是8-channel ultra-low voltage, Fm+ I2C-bus switch with reset，本站介紹了PCA9848BS的封裝應(yīng)用圖解、特點(diǎn)和優(yōu)點(diǎn)、功能等，并給出了與PCA9848BS相關(guān)的NXP元器件型號(hào)供參考。
PCA9848BS - 8-channel ultra-low voltage, Fm+ I2C-bus switch with reset - I²C增強(qiáng)快速模式 - I²C - 恩智浦, LLC
The PCA9848 is an ultra-low voltage, octal bidirectional translating switch controlled viathe I2C-bus. The SCL/SDA upstream pair fans out to eight downstream pairs, or channels.Any or all SCx/SDx channels can be selected, determined by the programmable controlregister. This feature allows multiple devices with the same I2C-bus address to reside onthe same bus. The switch device can also separate a heavily loaded I2C-bus into separatebus segments, eliminating the need for a bus buffer.
An active LOW reset input allows the PCA9848 to recover from a situation where one ofthe downstream I2C-buses is stuck in a LOW state. Pulling the RESET pin LOW resetsthe I2C-bus state machine and deselects all the channels, as does the internalPower-On Reset (POR) function.
The pass gates of the switches are constructed such that the VDD1 pin is used to limit themaximum high voltage which is passed by the PCA9848. This allows the use of differentbus voltages on each channel, so that 0.8 V, 1.8 V, 2.5 V or 3.3 V parts can communicatewithout any additional protection. External pull-up resistors pull the bus up to the desiredvoltage level for each channel. All I/O pins are 3.6 V tolerant.
- Ultra-low voltage operation, down to 0.8 V to interface with next-generation CPUs
- 1-of-8 bidirectional translating switch
- Fm+ I2C-bus interface logic; compatible with SMBus standards
- Active LOW reset input
- 2 address pins allowing up to 16 devices on the I2C-bus
- Channel selection via I2C-bus
- Power-up with all switch channels deselected
- Low Ron switches
- Allows voltage level translation between 0.8 V, 1.8 V, 2.5 V and 3.3 V buses
- Reset via I2C-bus software command
- I2C Device ID function
- No glitch on power-up
- Supports hot insertion since all channels are de-selected at power-on
- Low standby current
- 3.6 V tolerant inputs
- 0 Hz to 1 MHz clock frequency
- ESD protection exceeds 6000 V HBM per JESD22-A114 and 1000 V CDM perJESD22-C101
- Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
- Two packages offered: TSSOP24 and HVQFN24
