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NXP產(chǎn)品 - PTN3361CBS介紹
PTN3361CBS - Enhanced performance HDMI/DVI level shifter with active DDC buffer, supporting 1.65 Gbit/s operation

PTN3361CBS是NXP公司的一款高速多路復(fù)用器產(chǎn)品,PTN3361CBS是Enhanced performance HDMI/DVI level shifter with active DDC buffer, supporting 1.65 Gbit/s operation,本站介紹了PTN3361CBS的封裝應(yīng)用圖解、特點(diǎn)和優(yōu)點(diǎn)、功能等,并給出了與PTN3361CBS相關(guān)的NXP元器件型號供參考。

PTN3361CBS - Enhanced performance HDMI/DVI level shifter with active DDC buffer, supporting 1.65 Gbit/s operation - 高速多路復(fù)用器 - DisplayPort - 恩智浦, LLC

產(chǎn)品描述

PTN3361C is a high-speed level shifter device which converts four lanes of low-swing AC-coupled differential input signals to DVI v1.0 and HDMI v1.4b compliant open-drain current-steering differential output signals, up to 1.65 Gbit/s per lane to support 1080p applications. Each of these lanes provides a level-shifting differential buffer to translate from low-swing AC-coupled differential signaling on the source side, to TMDS-type DC-coupled differential current-mode signaling terminated into 50 Ohms to 3.3 V on the sink side. Additionally, PTN3361C provides a single-ended active buffer for voltage translation of the HPD signal from 5 V on the sink side to 3.3 V on the source side and provides a channel with active buffering and level shifting of the DDC channel (consisting of a clock and a data line) between 3.3 V source-side and 5 V sink-side. The DDC channel is implemented using active I2C-bus buffer technology providing capacitive isolation, redriving and level shifting as well as disablement (isolation between source and sink) of the clock and data lines.

The low-swing AC-coupled differential input signals to PTN3361C typically come from a display source with multi-mode I/O, which supports multiple display standards, for example, DisplayPort, HDMI and DVI. While the input differential signals are configured to carry DVI or HDMI coded data, they do not comply with the electrical requirements of the DVI v1.0 or HDMI v1.4b specification. By using PTN3361C, chip set vendors are able to implement such reconfigurable I/Os on multi-mode display source devices, allowing the support of multiple display standards while keeping the number of chip set I/O pins low.

PTN3361C features low-swing self-biasing differential inputs which are compliant to the electrical specifications of DisplayPort Standard v1.2 and/or PCI Express Standard v1.1, and open-drain current-steering differential outputs compliant to DVI v1.0 and HDMI v1.4b electrical specifications. The I2C-bus channel actively buffers as well as level-translates the DDC signals for optimal capacitive isolation. PTN3361C also supports power-saving modes in order to minimize current consumption when no display is active or connected.

PTN3361C can be used for either HDMI or DVI level shifting. It provides additional features supporting HDMI dongle detection; since support of HDMI dongle detection via the DDC channel is mandatory, the system applications shall enable this feature for correct operation.

PTN3361C is powered from a single 3.3 V power supply and is offered in a 32-terminal HVQFN32 package.

產(chǎn)品特性和優(yōu)勢

High-speed TMDS level shifting

  • Converts four lanes of low-swing AC-coupled differential input signals to DVI v1.0 and HDMI v1.4b compliant open-drain current-steering differential output signals
  • TMDS level shifting operation up to 1.65 Gbit/s per lane
  • Programmable equalizer
  • Integrated 50 Ohm termination resistors for self-biasing differential inputs
  • Back-current safe outputs to disallow current when device power is off and monitor is on
  • Disable feature to turn off TMDS inputs and outputs and to enter low-power state

DDC level shifting

  • Integrated DDC buffering and level shifting (3.3 V source to 5 V sink side)
  • Rise time accelerator on sink-side DDC ports
  • 0 Hz to 400 kHz I2C-bus clock frequency
  • Back-power safe sink-side terminals to disallow backdrive current when power is off or when DDC is not enabled

HPD level shifting

  • HPD non-inverting level shift from 0 V on the sink side to 0 V on the source side, or from 5 V on the sink side to 3.3 V on the source side
  • Integrated 200 kΩ pull-down resistor on HPD sink input guarantees 'input LOW' when no display is plugged in
  • Back-power safe design on HPD_SINK to disallow backdrive current when power is off

HDMI dongle detect support

  • Incorporates I2C slave ROM
  • Responds to DDC read to address 81h with predetermined byte sequence
  • Feature enabled by DDET pin (must be enabled for correct system operation using HDMI dongle)

General

  • Power supply 3.0 V to 3.6 V
  • ESD resilience to 6 kV HBM, 1 kV CDM
  • Power-saving modes (using output enable)
  • Back-current-safe design on all sink-side main link, DDC and HPD terminals
  • Transparent operation: no re-timing or software configuration required
  • 32-terminal HVQFN32 package
產(chǎn)品應(yīng)用
  • PC motherboard/graphics cards
  • Docking stations
  • DisplayPort to HDMI dongles/adapters supporting deep color video formats (must enable DDET)
  • DisplayPort to DVI dongles/adapters required to drive long cables
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