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74LVT02PW技術文檔下載：
74LVT02PW產品應用圖解：
74LVT02PW - 3.3 V四路2輸入或非門
74LVT02PW是NXP公司的一款或非門產品，74LVT02PW是3.3 V四路2輸入或非門，本站介紹了74LVT02PW的封裝應用圖解、特點和優(yōu)點、功能等，并給出了與74LVT02PW相關的NXP元器件型號供參考。
74LVT02PW - 3.3 V四路2輸入或非門 - 或非門 - 門 - 恩智浦, LLC
產品描述
The 74LVT02 is a quad 2-input NOR gate. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
產品特性和優(yōu)勢
- Wide supply voltage range from 2.7 V to 3.6 V
- Overvoltage tolerant inputs to 5.5 V
- BiCMOS high speed and output drive
- Direct interface with TTL levels
- IOFF circuitry provides partial Power-down mode operation
- Latch-up performance exceeds 500 mA per JESD 78 Class II Level B
- Complies with JEDEC standards:
- JESD8C (2.7 V to 3.6 V)
- ESD protection:
- HBM EIA/JESD22-A114-A exceeds 2000?V
- MM EIA/JESD22-A115-A exceeds 200?V
- Specified from -40?°C to 85?°C
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